Newly appointed Federal Minister for Science & Technology, Mr Shibli Faraz, visited Real-time Intelligent Secure Computing (RISC) Research Lab at the NUST-SEECS-
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Newly appointed Federal Minister for Science & Technology, Mr Shibli Faraz, visited Real-time Intelligent Secure Computing (RISC) Research Lab at the NUST School of Electrical Engineering and Computer Science during his maiden visit to NUST on April 26, 2021.
He was briefed about the lab’s flagship project, Design of Indigenous Silicon-Proven Microprocessor. The processor’s microarchitecture is based on RISC-V open-source ISA. The unique aspect of the project is its completely home-grown RTL which makes it truly indigenous and unique in comparison to using open source cores. The minister was also presented with the project demo. He praised the project as a step towards self-reliance and called it a timely intervention that will help reduce the dependence on foreign sources for microprocessor requirements in the long run.
The RISC Research Lab is being led by Dr. Rehan Ahmed. He and his team are working on steps towards the processor fabrication with some interesting AI, IoT and healthcare use-cases.